Semiconductor memories are usually considered to be a vital microelectronic component of digital logic system design. For example, semiconductor memories are extensively used in devices such as computers and in microprocessor-based applications ranging from satellites to consumer electronics. In order to keep up with increasing demand for semiconductor memories, various advances have been made in the field of semiconductor memory fabrication. These advantages include, for example, enhancements in the semiconductor fabrication process, such as increase in scalability of semiconductor memories by increasing the integration density of semiconductor memories, and increase in operating speeds of semiconductor memories.
Generally, semiconductor memory devices may be categorized as volatile memory devices or non-volatile memory devices. There are some distinct differences between volatile and non-volatile memory devices. For example, volatile semiconductor memory devices lose stored data when power supplies are interrupted. The non-volatile memory devices retain stored data even when power supplies are interrupted. The non-volatile memory devices include, for example, mask read-only memories (MROMs), programmable read-only memories (PROMs), erasable programmable read-only memories (EPROMs), and electrically erasable programmable read-only memories (EEPROMs).
MROMs, PROMs, and EPROMs have a difficulty in rewriting stored data because read and write operations cannot be freely conducted by normal users. On the other hand, EEPROMs are increasingly used in system programming that requires the continuous update or auxiliary memory devices. Particularly, flash memory EEPROMs can be advantageously used as mass storage devices because their integration density is higher than conventional EEPROMs.
Flash memory devices may be classified into NOR-type flash memories (hereinafter, referred to as “NOR flash memories”) and NAND-type flash memories (hereinafter, referred to as “NAND flash memories”). This classification is based on cell-bitline connection status. For example, in a NOR flash memory, at least two cell transistors are connected to a bitline in parallel. Furthermore, NOR flash memories store data by means of channel hot electron and erase data by means of F-N tunneling. In contrast, in a NAND flash memory, at least two cell transistors are connected to a bitline in series. Furthermore, NAND flash memories are disadvantageous in increasing integration density due to their high power consumption. However, NOR flash memories have the advantage of having a high operation speed. In recent years, many efforts have been made towards increasing the integration density of NOR flash memories. One of these efforts is based in the concept of multi-level cell (hereinafter referred to as “MLC”).
In a case where, for example, single-bit data is stored in a flash memory, data stored in a unit cell may be expressed by two threshold voltage distributions, each corresponding to data “1” and data “0”. On the other hand, in a case where two-bit data is stored in a flash memory, data stored in a unit cell may be expressed by four threshold voltage distributions, each corresponding to data “11”, data “10”, data “00” and data “01”. As a number of bits of data stored in respective cells increases, the number of voltage levels for programming, erasing, and reading operations also increase.
Therefore, it is required to precisely generate respective voltages for programming, erasing, and reading operations in the flash memory. In addition, it is required to maintain levels of the respective voltages without being changed. It is also required to alter levels of the respective voltages actually applied to the flash memory without extra processes such as a fuse cutting and a metal option.